Specific IP cores can be integrated into FPGAs on cameras. Peak detection is an image processing function typical for laser triangulation.

The AXIS_PEAK core is an image processing IP core used to detect bright horizontal lines in the image and calculate coordinates of the points in the line. The purpose is reduction of bandwidth from imaging sensor to communication interface (e. g. Gigabit Ethernet) and lowering the load on main processor. This way the imaging sensor can run at maximal speed at low data rates on communication interface.

The IP core was designed with scalable degree of parallelism – typically 8 pixels are processed per one clock cycle (64-bit pixel bus). The algorithm itself enables extraction of multiple lines in an image (multiline laser triangulation possible). Each point is extracted with 8bit subpixel precision. IP core features also adjustable 2D convolutional image filter.


Figure 1: Image (up) and image processing result – line coordinates (down).